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52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
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#ifndef _ASM_SCORE_SCOREREGS_H
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#define _ASM_SCORE_SCOREREGS_H
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#include <linux/linkage.h>
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/* TIMER register */
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#define TIME0BASE 0x96080000
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#define P_TIMER0_CTRL (TIME0BASE + 0x00)
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#define P_TIMER0_CPP_CTRL (TIME0BASE + 0x04)
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#define P_TIMER0_PRELOAD (TIME0BASE + 0x08)
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#define P_TIMER0_CPP_REG (TIME0BASE + 0x0C)
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#define P_TIMER0_UPCNT (TIME0BASE + 0x10)
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/* Timer Controller Register */
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/* bit 0 Timer enable */
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#define TMR_DISABLE 0x0000
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#define TMR_ENABLE 0x0001
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/* bit 1 Interrupt enable */
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#define TMR_IE_DISABLE 0x0000
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#define TMR_IE_ENABLE 0x0002
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/* bit 2 Output enable */
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#define TMR_OE_DISABLE 0x0004
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#define TMR_OE_ENABLE 0x0000
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/* bit4 Up/Down counting selection */
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#define TMR_UD_DOWN 0x0000
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#define TMR_UD_UP 0x0010
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/* bit5 Up/Down counting control selection */
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#define TMR_UDS_UD 0x0000
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#define TMR_UDS_EXTUD 0x0020
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/* bit6 Time output mode */
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#define TMR_OM_TOGGLE 0x0000
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#define TMR_OM_PILSE 0x0040
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/* bit 8..9 External input active edge selection */
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#define TMR_ES_PE 0x0000
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#define TMR_ES_NE 0x0100
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#define TMR_ES_BOTH 0x0200
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/* bit 10..11 Operating mode */
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#define TMR_M_FREE 0x0000 /* free running timer mode */
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#define TMR_M_PERIODIC 0x0400 /* periodic timer mode */
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#define TMR_M_FC 0x0800 /* free running counter mode */
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#define TMR_M_PC 0x0c00 /* periodic counter mode */
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#define SYSTEM_CLOCK (27*1000000/4) /* 27 MHz */
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#endif /* _ASM_SCORE_SCOREREGS_H */
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