2009-09-24 00:46:15 +00:00
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/*
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* Copyright (c) 2005-2009 Brocade Communications Systems, Inc.
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* All rights reserved
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* www.brocade.com
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*
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* Linux driver for Brocade Fibre Channel Host Bus Adapter.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (GPL) Version 2 as
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* published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef __BFA_IOCFC_H__
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#define __BFA_IOCFC_H__
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#include <bfa_ioc.h>
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#include <bfa.h>
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#include <bfi/bfi_iocfc.h>
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#include <bfa_callback_priv.h>
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#define BFA_REQQ_NELEMS_MIN (4)
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#define BFA_RSPQ_NELEMS_MIN (4)
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struct bfa_iocfc_regs_s {
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bfa_os_addr_t intr_status;
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bfa_os_addr_t intr_mask;
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bfa_os_addr_t cpe_q_pi[BFI_IOC_MAX_CQS];
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bfa_os_addr_t cpe_q_ci[BFI_IOC_MAX_CQS];
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bfa_os_addr_t cpe_q_depth[BFI_IOC_MAX_CQS];
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bfa_os_addr_t cpe_q_ctrl[BFI_IOC_MAX_CQS];
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bfa_os_addr_t rme_q_ci[BFI_IOC_MAX_CQS];
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bfa_os_addr_t rme_q_pi[BFI_IOC_MAX_CQS];
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bfa_os_addr_t rme_q_depth[BFI_IOC_MAX_CQS];
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bfa_os_addr_t rme_q_ctrl[BFI_IOC_MAX_CQS];
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};
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/**
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* MSIX vector handlers
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*/
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#define BFA_MSIX_MAX_VECTORS 22
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typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);
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struct bfa_msix_s {
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int nvecs;
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bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];
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};
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/**
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* Chip specific interfaces
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*/
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struct bfa_hwif_s {
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void (*hw_reginit)(struct bfa_s *bfa);
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void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq);
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void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);
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void (*hw_msix_install)(struct bfa_s *bfa);
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void (*hw_msix_uninstall)(struct bfa_s *bfa);
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void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);
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void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,
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u32 *nvecs, u32 *maxvec);
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};
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typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);
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struct bfa_iocfc_s {
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struct bfa_s *bfa;
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struct bfa_iocfc_cfg_s cfg;
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int action;
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u32 req_cq_pi[BFI_IOC_MAX_CQS];
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u32 rsp_cq_ci[BFI_IOC_MAX_CQS];
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struct bfa_cb_qe_s init_hcb_qe;
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struct bfa_cb_qe_s stop_hcb_qe;
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struct bfa_cb_qe_s dis_hcb_qe;
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struct bfa_cb_qe_s stats_hcb_qe;
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bfa_boolean_t cfgdone;
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struct bfa_dma_s cfg_info;
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struct bfi_iocfc_cfg_s *cfginfo;
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struct bfa_dma_s cfgrsp_dma;
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struct bfi_iocfc_cfgrsp_s *cfgrsp;
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struct bfi_iocfc_cfg_reply_s *cfg_reply;
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u8 *stats_kva;
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u64 stats_pa;
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struct bfa_fw_stats_s *fw_stats;
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struct bfa_timer_s stats_timer; /* timer */
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struct bfa_iocfc_stats_s *stats_ret; /* driver stats location */
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bfa_status_t stats_status; /* stats/statsclr status */
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bfa_boolean_t stats_busy; /* outstanding stats */
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bfa_cb_ioc_t stats_cbfn; /* driver callback function */
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void *stats_cbarg; /* user callback arg */
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struct bfa_dma_s req_cq_ba[BFI_IOC_MAX_CQS];
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struct bfa_dma_s req_cq_shadow_ci[BFI_IOC_MAX_CQS];
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struct bfa_dma_s rsp_cq_ba[BFI_IOC_MAX_CQS];
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struct bfa_dma_s rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];
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struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */
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struct bfa_hwif_s hwif;
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bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */
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void *updateq_cbarg; /* bios callback arg */
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};
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#define bfa_lpuid(__bfa) bfa_ioc_portid(&(__bfa)->ioc)
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#define bfa_msix_init(__bfa, __nvecs) \
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2009-09-25 19:29:54 +00:00
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((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))
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2009-09-24 00:46:15 +00:00
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#define bfa_msix_install(__bfa) \
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2009-09-25 19:29:54 +00:00
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((__bfa)->iocfc.hwif.hw_msix_install(__bfa))
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2009-09-24 00:46:15 +00:00
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#define bfa_msix_uninstall(__bfa) \
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2009-09-25 19:29:54 +00:00
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((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))
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2009-09-24 00:46:15 +00:00
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#define bfa_isr_mode_set(__bfa, __msix) \
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2009-09-25 19:29:54 +00:00
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((__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix))
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2009-09-24 00:46:15 +00:00
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#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \
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(__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec)
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/*
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* FC specific IOC functions.
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*/
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void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg, u32 *km_len,
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u32 *dm_len);
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void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,
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struct bfa_iocfc_cfg_s *cfg, struct bfa_meminfo_s *meminfo,
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struct bfa_pcidev_s *pcidev);
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void bfa_iocfc_detach(struct bfa_s *bfa);
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void bfa_iocfc_init(struct bfa_s *bfa);
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void bfa_iocfc_start(struct bfa_s *bfa);
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void bfa_iocfc_stop(struct bfa_s *bfa);
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void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);
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void bfa_iocfc_set_snsbase(struct bfa_s *bfa, u64 snsbase_pa);
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bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);
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void bfa_iocfc_reset_queues(struct bfa_s *bfa);
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void bfa_iocfc_updateq(struct bfa_s *bfa, u32 reqq_ba, u32 rspq_ba,
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u32 reqq_sci, u32 rspq_spi,
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bfa_cb_iocfc_t cbfn, void *cbarg);
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void bfa_msix_all(struct bfa_s *bfa, int vec);
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void bfa_msix_reqq(struct bfa_s *bfa, int vec);
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void bfa_msix_rspq(struct bfa_s *bfa, int vec);
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void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);
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void bfa_hwcb_reginit(struct bfa_s *bfa);
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void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq);
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void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);
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void bfa_hwcb_msix_install(struct bfa_s *bfa);
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void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);
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void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
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void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap,
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u32 *nvecs, u32 *maxvec);
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void bfa_hwct_reginit(struct bfa_s *bfa);
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void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq);
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void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);
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void bfa_hwct_msix_install(struct bfa_s *bfa);
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void bfa_hwct_msix_uninstall(struct bfa_s *bfa);
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void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
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void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap,
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u32 *nvecs, u32 *maxvec);
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void bfa_com_meminfo(bfa_boolean_t mincfg, u32 *dm_len);
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void bfa_com_attach(struct bfa_s *bfa, struct bfa_meminfo_s *mi,
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bfa_boolean_t mincfg);
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void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t **wwns);
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#endif /* __BFA_IOCFC_H__ */
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